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  2. IP 核
  3. Processor System Reset Module

Processor System Reset Module

簡介

现金网博e百 描述

The Xilinx Processor System Reset Module design allows the customer to tailor the design to suit their application by setting certain parameters to enable/disable features. The parameterizable features of the design are discussed in Processor System Reset Module Design Parameters.

主要特性與優勢

  • Asynchronous external reset input is synchronized with clock.
  • Asynchronous auxiliary external reset input is synchronized with clock.
  • Both the external and auxiliary reset inputs are selectable active high or active low.
  • Selectable minimum pulse width for reset inputs to be recognized.
  • Selectable load equalizing.
  • DCM Locked input.
  • Power On Reset generation.

資源利用

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