3GPP LTE PUCCH Receiver 的现金网博e百 和軟件要求

Hardware Evaluation Time Out Period * : ~ 2-3 hrs

軟件需求表

LogiCORE™ 版本 AXI 支持 軟件支持 支持的器件係列
3GPP LTE PUCCH Receiver v2.0 AXI4-Stream Vivado® 2020.2 Versal™ ACAP
UltraScale+™ 係列
Kintex® UltraScale™
Virtex® UltraScale
Zynq®-7000
Kintex-7 / -2L
Virtex-7 / -2L
3GPP LTE PUCCH Receiver v1.0 AXI4-Stream ISE® 13.4 Kintex-7 / -2L
Virtex-7 / -2L
Virtex-6 LXT / SXT / CXT / -1L
Virtex-5 FXT / SXT / LXT

Download the required software from the Xilinx.comDownloadspage. For information onNew Features, Known Issues, and Patchesplease refer to theLicensing Solution Center.

* A Hardware Evaluation license for any of the IP cores above will enable you to parameterize, generate and instantiate these cores in your design. You will also be able to perform functional and timing simulation and generate a bitstream that you can use to download and configure your design in hardware.

The IP cores in this table will be fully functional in the programmed device for certain amount of time. After this time, the IP will "time out" (cease to function) and you will need to download and configure the FPGA again.