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  2. IP 核
  3. Spartan-3 LogiCORE Endpoint PIPE for PCI Express (PCIe)
  4. LogiCORE IP Endpoint PIPE for PCI Express Software Requirements

LogiCORE IP Endpoint PIPE for PCI Express Software Requirements

硬件評估超時時間 *：大約 8 小時

SOFTWARE Requirements Table

LogiCORE™ Version Required Patches Software Support Supported Device Families
Endpoint PIPE for PCI Express® v1.8 ISE® 12.2 ISE® 12.2 Spartan®-3 (-4)
Spartan-3E (-4)
Spartan-3A (-4)

SIMULATION Requirements

Accessing the NXP PX1011A PHY Simulation Files

A NXP PX1011A-EL1 PCI Express PHY model is required to simulate the Xilinx LogiCORE™ IP Endpoint PIPE for PCI Express (EF-DI-PCIE-PIPE-SITE). This PHY model is the property of NXP, and is not included with the Xilinx LogiCORE IP release. Please refer to theGetting Started Guidefor information on accessing this model.

Be sure to include your complete contact information in any correspondence with NXP to facilitate a prompt response.

從 Xilinx.com下載頁麵下載所需的軟件。如欲了解有關新特性、已知問題和補丁的信息，請參考許可解決方案中心。

* 上述任何 IP 核的硬件評估許可證都將幫助您在您的設計中生成這些內核，並對其進行參數化和實例化。此外，您還能夠執行功能及時序仿真，並生成一個您可用於下載和配置您的硬件設計的比特流。

該表中的 IP 核將在編程的器件中全麵工作一段時間。這段時間之後，IP 將“超時”（停止工作），您需要再次下載並配置 FPGA。