Resource Utilization for QSGMII v3.4

Vivado Design Suite Release 2017.3

Interpreting the results

This page contains resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

The IP core's example design is opened in Vivado Design Suite, and synthesis and implementation are run. Resource figures are taken from the utilization report issued at the end of implementation, and are for the IP instance only, excluding other parts of the example design.
LUT figures do not include LUTs used as pack-thrus, but do include LUTs used as memory.
Default Vivado Design Suite 2017.3 settings were used. You may be able to improve on these figures using different settings. Because surrounding circuitry will affect placement and timing, no guarantee can be given that these figures will be repeatable in a larger design.

Data is provided for the following device families:

Artix-7
Kintex-7
Kintex UltraScale
Kintex UltraScale+
Virtex-7
Virtex UltraScale
Zynq-7000
Zynq UltraScale+

Artix-7

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	LUT-FF Pairs	DSP48s	36k BRAMs	18k BRAMs	BUFGCTRL	BUFG	BUFR	MMCME2_ADV	Speedfile Status
xc7a200t	ffg1156	-2	a_a7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2442	4237	1274	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	a_a7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2425	4229	1254	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	a_a7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2072	3853	1046	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	a_a7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2436	4229	1270	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	a_a7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2421	4221	1252	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	a_a7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2060	3829	1029	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	a_a7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1999	3537	1037	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	a_a7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1998	3529	1021	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	a_a7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1726	3213	872	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	aa_a7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2439	4215	1271	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	aa_a7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2424	4207	1221	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	aa_a7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2071	3831	1036	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	aa_a7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2436	4207	1230	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	aa_a7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2421	4199	1247	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	aa_a7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2060	3807	1028	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	aa_a7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2003	3515	1021	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	aa_a7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1999	3507	1017	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	aa_a7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1727	3191	876	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	b_a7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2517	4549	1229	0	0	0	5	5	6	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	b_a7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2505	4541	1248	0	0	0	5	5	6	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	b_a7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2113	4137	1022	0	0	0	5	5	6	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	b_a7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2492	4533	1230	0	0	0	5	5	6	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	b_a7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2490	4525	1251	0	0	0	5	5	6	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	b_a7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2072	4069	1015	0	0	0	5	5	6	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	b_a7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	2032	3757	997	0	0	0	5	5	6	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	b_a7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	2029	3749	994	0	0	0	5	5	6	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	b_a7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1760	3477	828	0	0	0	5	5	6	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ba_a7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2512	4507	1255	0	0	0	1	1	4	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ba_a7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2500	4499	1212	0	0	0	1	1	4	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ba_a7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2108	4095	1030	0	0	0	1	1	4	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ba_a7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2488	4491	1203	0	0	0	1	1	4	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ba_a7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2485	4483	1236	0	0	0	1	1	4	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ba_a7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2068	4027	1000	0	0	0	1	1	4	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ba_a7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2030	3715	1017	0	0	0	1	1	4	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ba_a7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2027	3707	991	0	0	0	1	1	4	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ba_a7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1755	3435	830	0	0	0	1	1	4	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	c_a7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2597	4403	1394	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	c_a7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2585	4395	1389	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	c_a7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2194	3991	1143	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	c_a7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2571	4387	1370	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	c_a7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2570	4379	1339	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	c_a7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2152	3923	1133	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	c_a7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	2115	3623	1110	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	c_a7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	2112	3615	1123	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	c_a7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1840	3331	953	0	0	0	5	5	2	1	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ca_a7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2593	4361	1373	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ca_a7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2581	4353	1376	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ca_a7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2188	3949	1140	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ca_a7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2567	4345	1366	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ca_a7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2565	4337	1352	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ca_a7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2148	3881	1124	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ca_a7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	2111	3581	1112	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ca_a7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	2103	3573	1120	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11
xc7a200t	ffg1156	-2	ca_a7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1834	3289	950	0	0	0	1	1	0	0	PRODUCTION 1.19 2017-08-11

Kintex-7

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	LUT-FF Pairs	DSP48s	36k BRAMs	18k BRAMs	BUFGCTRL	BUFG	BUFR	MMCME2_ADV	Speedfile Status
xc7k325t	ffg900	-2	d_k7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2332	4029	1224	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	d_k7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2315	4021	1213	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	d_k7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1963	3645	1009	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	d_k7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2325	4021	1207	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	d_k7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2309	4013	1205	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	d_k7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1948	3621	1012	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	d_k7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1889	3329	997	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	d_k7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1889	3321	997	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	d_k7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1616	3005	831	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	da_k7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2331	4019	1238	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	da_k7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2314	4011	1215	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	da_k7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1962	3635	1009	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	da_k7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2326	4011	1220	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	da_k7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2310	4003	1193	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	da_k7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1949	3611	983	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	da_k7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1892	3319	993	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	da_k7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1888	3311	993	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	da_k7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1611	2995	823	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	e_k7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2403	4341	1181	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	e_k7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2385	4333	1154	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	e_k7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1996	3929	949	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	e_k7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2375	4325	1159	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	e_k7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2371	4317	1145	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	e_k7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1956	3861	955	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	e_k7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1919	3549	927	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	e_k7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1915	3541	926	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	e_k7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1643	3269	762	0	0	0	4	4	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	ea_k7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2405	4311	1193	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	ea_k7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2391	4303	1168	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	ea_k7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1999	3899	964	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	ea_k7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2377	4295	1156	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	ea_k7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2373	4287	1142	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	ea_k7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1958	3831	944	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	ea_k7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1918	3519	934	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	ea_k7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1917	3511	932	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	ea_k7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1645	3239	776	0	0	0	1	1	4	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	f_k7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2491	4195	1312	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	f_k7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2474	4187	1321	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	f_k7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2084	3783	1085	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	f_k7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2462	4179	1309	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	f_k7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2456	4171	1290	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	f_k7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2040	3715	1070	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	f_k7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	2006	3415	1089	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	f_k7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	2000	3407	1057	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	f_k7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1730	3123	924	0	0	0	4	4	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	fa_k7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2484	4165	1342	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	fa_k7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2471	4157	1317	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	fa_k7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2077	3753	1070	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	fa_k7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2456	4149	1314	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	fa_k7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2453	4141	1311	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	fa_k7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2038	3685	1059	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	fa_k7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1999	3385	1072	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	fa_k7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1996	3377	1071	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17
xc7k325t	ffg900	-2	fa_k7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1725	3093	926	0	0	0	1	1	0	0	PRODUCTION 1.12 2017-02-17

Kintex UltraScale

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	LUT-FF Pairs	DSP48s	36k BRAMs	18k BRAMs	BUFGCE	BUFGCE_DIV	BUFG_GT	MMCME3_ADV	Speedfile Status
xcku115	flva1517	-3	m_ku_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2192	3890	1119	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	m_ku_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2168	3882	1086	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	m_ku_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1840	3506	905	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	m_ku_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2177	3882	1089	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	m_ku_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2157	3874	1099	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	m_ku_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1828	3482	914	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	m_ku_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1734	3190	877	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	m_ku_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1725	3182	873	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	m_ku_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1459	2866	716	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	ma_ku_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2188	3880	1098	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	ma_ku_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2170	3872	1086	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	ma_ku_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1845	3496	900	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	ma_ku_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2171	3872	1099	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	ma_ku_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2162	3864	1071	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	ma_ku_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1820	3472	915	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	ma_ku_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1737	3180	891	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	ma_ku_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1729	3172	883	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	ma_ku_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1461	2856	734	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	n_ku_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2263	4282	1152	0	0	0	4	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	n_ku_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2274	4274	1142	0	0	0	4	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	n_ku_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1896	3870	935	0	0	0	4	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	n_ku_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2265	4266	1146	0	0	0	4	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	n_ku_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2260	4258	1146	0	0	0	4	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	n_ku_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1855	3802	917	0	0	0	4	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	n_ku_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1785	3490	883	0	0	0	4	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	n_ku_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1770	3482	862	0	0	0	4	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	n_ku_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1505	3210	690	0	0	0	4	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	na_ku_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2253	4252	1136	0	0	0	4	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	na_ku_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2265	4244	1139	0	0	0	4	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	na_ku_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1883	3840	914	0	0	0	4	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	na_ku_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2245	4236	1113	0	0	0	4	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	na_ku_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2244	4228	1122	0	0	0	4	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	na_ku_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1839	3772	901	0	0	0	4	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	na_ku_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1765	3460	838	0	0	0	4	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	na_ku_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1757	3452	849	0	0	0	4	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	na_ku_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1489	3180	694	0	0	0	4	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	o_ku_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2337	4080	1247	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	o_ku_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2343	4072	1222	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	o_ku_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	1970	3668	1026	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	o_ku_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2332	4064	1208	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	o_ku_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2323	4056	1213	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	o_ku_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	1917	3600	1007	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	o_ku_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1844	3300	962	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	o_ku_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1828	3292	938	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	o_ku_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1570	3008	828	0	0	0	0	1	3	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	oa_ku_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2330	4050	1181	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	oa_ku_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2336	4042	1246	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	oa_ku_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	1958	3638	1030	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	oa_ku_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2335	4034	1186	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	oa_ku_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2315	4026	1157	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	oa_ku_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	1908	3570	990	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	oa_ku_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1837	3270	948	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	oa_ku_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1823	3262	923	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017
xcku115	flva1517	-3	oa_ku_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1563	2978	805	0	0	0	0	0	0	0	PRODUCTION 1.24 03-22-2017

Kintex UltraScale+

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	LUT-FF Pairs	DSP48s	36k BRAMs	18k BRAMs	BUFGCE	BUFGCE_DIV	BUFG_GT	Speedfile Status
xcku11p	ffve1517	-1	s_kup_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2478	4316	1280	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	s_kup_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2453	4308	1260	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	s_kup_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2143	3932	1024	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	s_kup_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2461	4308	1243	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	s_kup_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2448	4300	1249	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	s_kup_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2114	3908	1043	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	s_kup_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	2016	3616	1027	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	s_kup_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	2013	3608	1015	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	s_kup_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1751	3292	869	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	sa_kup_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2480	4306	1251	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	sa_kup_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2451	4298	1255	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	sa_kup_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2137	3922	1040	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	sa_kup_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2461	4298	1267	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	sa_kup_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2446	4290	1262	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	sa_kup_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2113	3898	1080	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	sa_kup_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2026	3606	973	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	sa_kup_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2018	3598	1018	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	sa_kup_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1752	3282	873	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	t_kup_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2551	4708	1265	0	0	0	4	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	t_kup_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2559	4700	1265	0	0	0	4	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	t_kup_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2193	4296	1073	0	0	0	4	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	t_kup_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2547	4692	1264	0	0	0	4	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	t_kup_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2548	4684	1259	0	0	0	4	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	t_kup_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2133	4228	1044	0	0	0	4	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	t_kup_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	2060	3916	999	0	0	0	4	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	t_kup_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	2055	3908	998	0	0	0	4	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	t_kup_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1790	3636	859	0	0	0	4	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ta_kup_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2540	4678	1260	0	0	0	4	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ta_kup_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2548	4670	1261	0	0	0	4	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ta_kup_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2178	4266	1046	0	0	0	4	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ta_kup_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2535	4662	1251	0	0	0	4	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ta_kup_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2536	4654	1256	0	0	0	4	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ta_kup_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2130	4198	1056	0	0	0	4	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ta_kup_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2049	3886	1000	0	0	0	4	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ta_kup_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2042	3878	1029	0	0	0	4	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ta_kup_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1775	3606	859	0	0	0	4	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	u_kup_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2616	4506	1366	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	u_kup_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2629	4498	1364	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	u_kup_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2245	4094	1147	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	u_kup_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2611	4490	1369	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	u_kup_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2615	4482	1349	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	u_kup_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2211	4026	1110	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	u_kup_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	2128	3726	1094	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	u_kup_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	2126	3718	1128	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	u_kup_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1859	3434	946	0	0	0	0	1	4	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ua_kup_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2614	4476	1320	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ua_kup_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2615	4468	1371	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ua_kup_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2249	4064	1163	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ua_kup_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2608	4460	1347	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ua_kup_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2606	4452	1346	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ua_kup_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2202	3996	1108	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ua_kup_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	2121	3696	1098	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ua_kup_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	2117	3688	1124	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017
xcku11p	ffve1517	-1	ua_kup_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1845	3404	942	0	0	0	0	0	1	PRODUCTION 1.14 09-15-2017

Virtex-7

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	LUT-FF Pairs	DSP48s	36k BRAMs	18k BRAMs	BUFGCTRL	BUFG	BUFR	MMCME2_ADV	Speedfile Status
xc7vx330t	ffg1157	-2	g_v7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2331	4030	1233	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	g_v7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2314	4022	1198	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	g_v7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1963	3646	1005	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	g_v7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2325	4022	1212	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	g_v7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2311	4014	1227	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	g_v7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1951	3622	996	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	g_v7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1892	3330	980	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	g_v7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1887	3322	983	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	g_v7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1618	3006	812	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ga_v7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2332	4020	1213	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ga_v7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2315	4012	1192	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ga_v7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1962	3636	1006	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ga_v7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2325	4012	1182	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ga_v7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2311	4004	1204	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ga_v7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1950	3612	988	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ga_v7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1892	3320	1002	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ga_v7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1887	3312	980	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ga_v7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1616	2996	811	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	h_v7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2402	4342	1190	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	h_v7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2384	4334	1171	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	h_v7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1993	3930	957	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	h_v7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2373	4326	1149	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	h_v7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2368	4318	1170	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	h_v7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1951	3862	944	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	h_v7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1916	3550	934	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	h_v7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1912	3542	943	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	h_v7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1641	3270	758	0	0	0	3	3	5	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ha_v7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2406	4312	1193	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ha_v7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2389	4304	1196	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ha_v7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1999	3900	969	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ha_v7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2378	4296	1163	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ha_v7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2372	4288	1160	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ha_v7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1958	3832	945	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ha_v7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1922	3520	949	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ha_v7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1917	3512	933	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ha_v7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1644	3240	771	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	i_v7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2491	4196	1305	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	i_v7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2474	4188	1285	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	i_v7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2084	3784	1085	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	i_v7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2462	4180	1304	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	i_v7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2458	4172	1266	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	i_v7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2043	3716	1080	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	i_v7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	2005	3416	1085	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	i_v7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	2001	3408	1042	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	i_v7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1730	3124	905	0	0	0	3	3	1	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ia_v7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2485	4166	1321	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ia_v7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2470	4158	1283	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ia_v7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2078	3754	1088	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ia_v7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2457	4150	1279	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ia_v7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2453	4142	1274	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ia_v7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2037	3686	1084	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ia_v7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	2000	3386	1062	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ia_v7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1996	3378	1047	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7vx330t	ffg1157	-2	ia_v7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1725	3094	912	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11

Virtex UltraScale

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	LUT-FF Pairs	DSP48s	36k BRAMs	18k BRAMs	BUFGCE	BUFGCE_DIV	BUFG_GT	MMCME3_ADV	Speedfile Status
xcvu160	flgb2104	-3	p_vu_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2186	3890	1095	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	p_vu_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2170	3882	1083	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	p_vu_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1843	3506	901	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	p_vu_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2172	3882	1080	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	p_vu_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2165	3874	1099	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	p_vu_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1825	3482	905	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	p_vu_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1736	3190	857	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	p_vu_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1732	3182	849	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	p_vu_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1462	2866	702	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	pa_vu_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2195	3880	1103	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	pa_vu_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2164	3872	1075	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	pa_vu_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1849	3496	902	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	pa_vu_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2169	3872	1098	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	pa_vu_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2158	3864	1076	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	pa_vu_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1827	3472	892	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	pa_vu_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1741	3180	886	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	pa_vu_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1730	3172	848	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	pa_vu_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1461	2856	691	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	q_vu_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2265	4282	1152	0	0	0	4	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	q_vu_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2267	4274	1151	0	0	0	4	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	q_vu_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1895	3870	920	0	0	0	4	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	q_vu_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2259	4266	1131	0	0	0	4	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	q_vu_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2256	4258	1141	0	0	0	4	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	q_vu_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1848	3802	897	0	0	0	4	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	q_vu_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1778	3490	857	0	0	0	4	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	q_vu_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1768	3482	876	0	0	0	4	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	q_vu_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1505	3210	680	0	0	0	4	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	qa_vu_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2256	4252	1129	0	0	0	4	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	qa_vu_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2257	4244	1093	0	0	0	4	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	qa_vu_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1890	3840	924	0	0	0	4	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	qa_vu_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2251	4236	1073	0	0	0	4	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	qa_vu_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2244	4228	1078	0	0	0	4	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	qa_vu_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1837	3772	879	0	0	0	4	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	qa_vu_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1763	3460	847	0	0	0	4	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	qa_vu_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1753	3452	850	0	0	0	4	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	qa_vu_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1485	3180	689	0	0	0	4	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	r_vu_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2328	4080	1181	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	r_vu_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2344	4072	1188	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	r_vu_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	1969	3668	989	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	r_vu_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2329	4064	1168	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	r_vu_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2333	4056	1235	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	r_vu_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	1927	3600	950	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	r_vu_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	1852	3300	954	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	r_vu_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	1843	3292	924	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	r_vu_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1578	3008	791	0	0	0	0	1	3	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	ra_vu_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2323	4050	1175	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	ra_vu_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2332	4042	1189	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	ra_vu_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	1963	3638	990	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	ra_vu_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2314	4034	1157	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	ra_vu_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2315	4026	1154	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	ra_vu_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	1912	3570	946	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	ra_vu_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1835	3270	951	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	ra_vu_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1824	3262	923	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017
xcvu160	flgb2104	-3	ra_vu_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1561	2978	809	0	0	0	0	0	0	0	PRODUCTION 1.25 03-22-2017

Zynq-7000

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	LUT-FF Pairs	DSP48s	36k BRAMs	18k BRAMs	BUFGCTRL	BUFG	BUFR	MMCME2_ADV	Speedfile Status
xc7z100	ffg1156	-2	j_z7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2328	4029	1230	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	j_z7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2313	4021	1217	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	j_z7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1962	3645	1011	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	j_z7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2325	4021	1192	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	j_z7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2309	4013	1211	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	j_z7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1950	3621	1007	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	j_z7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1892	3329	987	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	j_z7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1885	3321	979	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	j_z7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1616	3005	826	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ja_z7_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2332	4019	1185	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ja_z7_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2312	4011	1218	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ja_z7_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1960	3635	1001	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ja_z7_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2326	4011	1207	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ja_z7_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2311	4003	1202	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ja_z7_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1950	3611	995	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ja_z7_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1891	3319	988	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ja_z7_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1887	3311	985	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ja_z7_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1617	2995	812	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	k_z7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2400	4341	1181	0	0	0	4	4	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	k_z7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2385	4333	1163	0	0	0	4	4	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	k_z7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	1993	3929	970	0	0	0	4	4	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	k_z7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2373	4325	1153	0	0	0	4	4	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	k_z7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2368	4317	1146	0	0	0	4	4	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	k_z7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	1952	3861	947	0	0	0	4	4	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	k_z7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1917	3549	932	0	0	0	4	4	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	k_z7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	1911	3541	926	0	0	0	4	4	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	k_z7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1640	3269	761	0	0	0	4	4	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ka_z7_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2405	4311	1187	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ka_z7_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2390	4303	1163	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ka_z7_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	1998	3899	949	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ka_z7_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2378	4295	1141	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ka_z7_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2372	4287	1152	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ka_z7_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	1958	3831	945	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ka_z7_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1921	3519	935	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ka_z7_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1917	3511	935	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	ka_z7_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1646	3239	776	0	0	0	1	1	4	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	l_z7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2490	4195	1297	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	l_z7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2474	4187	1295	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	l_z7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2083	3783	1088	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	l_z7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2462	4179	1296	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	l_z7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2454	4171	1271	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	l_z7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2041	3715	1069	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	l_z7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	2003	3415	1055	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	l_z7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	2000	3407	1082	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	l_z7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1727	3123	905	0	0	0	4	4	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	la_z7_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2485	4165	1308	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	la_z7_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2470	4157	1295	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	la_z7_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2079	3753	1088	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	la_z7_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2458	4149	1284	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	la_z7_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2453	4141	1311	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	la_z7_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2038	3685	1081	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	la_z7_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1999	3385	1058	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	la_z7_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1996	3377	1042	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11
xc7z100	ffg1156	-2	la_z7_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1722	3093	898	0	0	0	1	1	0	0	PRODUCTION 1.11 2014-09-11

Zynq UltraScale+

Part Information			Configuration Parameters									Resource Utilization
Device	Package	Speed Grade	Configuration Name	Mode	Management_Interface	Config_Interface	Auto_Negotiation	AN_Config_Interface	GMII_or_MII_Mode	SupportLevel	TransceiverControl	LUTs	FFs	LUT-FF Pairs	DSP48s	36k BRAMs	18k BRAMs	BUFGCE	BUFGCE_DIV	BUFG_GT	Speedfile Status
xczu19eg	ffvd1760	-3	v_zup_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2480	4316	1231	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	v_zup_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2453	4308	1203	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	v_zup_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2131	3932	1022	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	v_zup_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2458	4308	1213	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	v_zup_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2445	4300	1225	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	v_zup_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2114	3908	1009	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	v_zup_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	2025	3616	999	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	v_zup_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	2019	3608	1007	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	v_zup_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1751	3292	844	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	va_zup_mac_ani_an_m_cfi_ver	MAC_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2475	4306	1235	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	va_zup_mac_ani_an_m_ncfi_ver	MAC_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2451	4298	1221	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	va_zup_mac_ani_an_nm_cfi_ver	MAC_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2136	3922	1029	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	va_zup_mac_nani_an_m_cfi_ver	MAC_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2457	4298	1225	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	va_zup_mac_nani_an_m_ncfi_ver	MAC_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2445	4290	1214	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	va_zup_mac_nani_an_nm_cfi_ver	MAC_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2120	3898	1023	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	va_zup_mac_nani_nan_m_cfi_ver	MAC_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2020	3606	992	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	va_zup_mac_nani_nan_m_ncfi_ver	MAC_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2016	3598	994	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	va_zup_mac_nani_nan_nm_cfi_ver	MAC_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1751	3282	832	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	w_zup_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2548	4708	1217	0	0	0	4	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	w_zup_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Core	false	2553	4700	1253	0	0	0	4	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	w_zup_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Core	false	2189	4296	1036	0	0	0	4	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	w_zup_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2550	4692	1216	0	0	0	4	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	w_zup_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Core	false	2541	4684	1198	0	0	0	4	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	w_zup_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Core	false	2142	4228	1033	0	0	0	4	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	w_zup_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Core	false	2064	3916	982	0	0	0	4	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	w_zup_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Core	false	2055	3908	994	0	0	0	4	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	w_zup_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Core	false	1790	3636	831	0	0	0	4	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	wa_zup_phy_gmii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2539	4678	1240	0	0	0	4	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	wa_zup_phy_gmii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2544	4670	1249	0	0	0	4	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	wa_zup_phy_gmii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	GMII	Include_Shared_Logic_in_Example_Design	false	2174	4266	1114	0	0	0	4	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	wa_zup_phy_gmii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2535	4662	1253	0	0	0	4	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	wa_zup_phy_gmii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2528	4654	1276	0	0	0	4	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	wa_zup_phy_gmii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	GMII	Include_Shared_Logic_in_Example_Design	false	2128	4198	1028	0	0	0	4	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	wa_zup_phy_gmii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2052	3886	983	0	0	0	4	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	wa_zup_phy_gmii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	2043	3878	991	0	0	0	4	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	wa_zup_phy_gmii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	GMII	Include_Shared_Logic_in_Example_Design	false	1780	3606	827	0	0	0	4	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	x_zup_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Core	false	2624	4506	1338	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	x_zup_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Core	false	2631	4498	1381	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	x_zup_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Core	false	2256	4094	1124	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	x_zup_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Core	false	2623	4490	1402	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	x_zup_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Core	false	2619	4482	1304	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	x_zup_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Core	false	2203	4026	1124	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	x_zup_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Core	false	2127	3726	1071	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	x_zup_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Core	false	2118	3718	1124	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	x_zup_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Core	false	1863	3434	929	0	0	0	0	1	4	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	xa_zup_phy_mii_ani_an_m_cfi_ver	PHY_MODE	true	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2611	4476	1329	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	xa_zup_phy_mii_ani_an_m_ncfi_ver	PHY_MODE	true	false	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2619	4468	1339	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	xa_zup_phy_mii_ani_an_nm_cfi_ver	PHY_MODE	false	true	true	true	MII	Include_Shared_Logic_in_Example_Design	false	2237	4064	1112	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	xa_zup_phy_mii_nani_an_m_cfi_ver	PHY_MODE	true	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2609	4460	1323	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	xa_zup_phy_mii_nani_an_m_ncfi_ver	PHY_MODE	true	false	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2603	4452	1311	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	xa_zup_phy_mii_nani_an_nm_cfi_ver	PHY_MODE	false	true	true	false	MII	Include_Shared_Logic_in_Example_Design	false	2200	3996	1133	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	xa_zup_phy_mii_nani_nan_m_cfi_ver	PHY_MODE	true	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	2112	3696	1081	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	xa_zup_phy_mii_nani_nan_m_ncfi_ver	PHY_MODE	true	false	false	false	MII	Include_Shared_Logic_in_Example_Design	false	2113	3688	1100	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017
xczu19eg	ffvd1760	-3	xa_zup_phy_mii_nani_nan_nm_cfi_ver	PHY_MODE	false	true	false	false	MII	Include_Shared_Logic_in_Example_Design	false	1847	3404	924	0	0	0	0	0	1	ADVANCE 1.14 09-15-2017

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