Performance and Resource Utilization for DFX Bitstream Monitor v1.0

Vivado Design Suite Release 2023.2

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Kintex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 321 235 426 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 321 326 427 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 321 475 626 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 313 586 628 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 321 235 426 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 321 326 427 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 321 475 626 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 313 586 628 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 306 217 426 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 306 319 427 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 329 479 626 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 306 587 629 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 313 224 426 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 313 322 428 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 298 472 626 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 298 566 627 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 337 226 426 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 298 306 427 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 313 474 626 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t fbg676 1 xc7k325tfbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 298 574 627 0 0 0 PRODUCTION 1.12 2017-02-17

Kintex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 391 228 426 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 375 308 431 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 375 407 626 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 352 516 627 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 391 228 426 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 375 308 431 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 375 407 626 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 352 516 627 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 399 230 427 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 352 308 427 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 375 417 626 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 360 513 627 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 383 219 426 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 360 305 427 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 383 414 626 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 337 518 627 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 391 220 426 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 368 308 427 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 391 408 626 0 0 0 PRODUCTION 1.25 12-04-2018
xcku040 fbva676 1 xcku040-fbva676-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 360 519 627 0 0 0 PRODUCTION 1.25 12-04-2018

Kintex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 587 225 426 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 532 306 427 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 571 491 626 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 516 589 627 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 587 225 426 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 532 306 427 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 571 491 626 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 516 589 627 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 602 225 426 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 548 311 427 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 594 499 626 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 508 586 627 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 571 225 426 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 556 314 429 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 540 478 626 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 532 589 627 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 625 233 427 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 524 306 427 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 579 498 626 0 0 0 PRODUCTION 1.29 05-01-2022
xcku13p ffve900 1 xcku13p-ffve900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 532 589 627 0 0 0 PRODUCTION 1.29 05-01-2022

Virtex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 313 235 426 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 329 328 427 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 329 475 626 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 313 587 629 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 313 235 426 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 329 328 427 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 329 475 626 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 313 587 629 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 313 235 426 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 306 319 427 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 329 498 626 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 298 567 627 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 321 232 426 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 282 297 429 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 329 494 626 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 306 575 627 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 344 232 426 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 313 314 427 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 329 501 626 0 0 0 PRODUCTION 1.11 2014-09-11
xc7vx690t ffg1157 1 xc7vx690tffg1157-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 290 564 627 0 0 0 PRODUCTION 1.11 2014-09-11

Virtex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 407 228 426 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 344 312 427 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 368 434 626 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 344 526 627 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 407 228 426 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 344 312 427 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 368 434 626 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 344 526 627 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 399 227 428 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 360 314 427 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 368 426 626 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 352 531 627 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 407 233 426 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 360 313 427 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 391 442 626 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 375 568 629 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 399 227 426 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 360 312 427 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 383 424 626 0 0 0 PRODUCTION 1.26 12-04-2018
xcvu095 ffvc1517 1 xcvu095-ffvc1517-1-i_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 337 527 627 0 0 0 PRODUCTION 1.26 12-04-2018

Virtex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 563 224 426 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 563 311 427 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 602 491 626 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 540 585 627 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 563 224 426 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 563 311 427 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 602 491 626 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 540 585 627 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 594 230 426 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 571 307 427 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 571 487 626 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 532 601 627 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 594 222 426 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 563 310 427 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 571 486 626 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 493 570 627 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 610 220 426 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 548 313 427 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 587 489 626 0 0 0 PRODUCTION 1.28 03-30-2022
xcvu11p flga2577 1 xcvu11p-flga2577-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 532 579 627 0 0 0 PRODUCTION 1.28 03-30-2022

Zynq-7000

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 298 217 426 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 290 297 427 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 306 474 626 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 306 579 627 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 298 217 426 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 290 297 427 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 306 474 626 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 306 579 627 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 329 232 426 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 313 322 427 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 321 473 626 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 313 582 631 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 306 222 426 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 306 313 431 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 321 494 626 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 290 572 628 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 337 220 426 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 306 316 427 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 313 477 628 0 0 0 PRODUCTION 1.12 2019-11-22
xc7z045 fbg676 1 xc7z045fbg676-1_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 313 587 627 0 0 0 PRODUCTION 1.12 2019-11-22

Zynq UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
RESET_ACTIVE_LEVEL
CTRL_INTERFACE_TYPE
CTRL_ADDR_WIDTH
STS_HIST_BUFFER_WHEN_FULL
DP_PROTOCOL
PROTOCOL_RESET_ACTIVE_LEVEL
DP_AXI_ID_WIDTH
DP_AXI_AWUSER_WIDTH
DP_AXI_WUSER_WIDTH
DP_AXI_BUSER_WIDTH
DP_AXI_ARUSER_WIDTH
DP_AXI_RUSER_WIDTH
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 602 224 426 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 556 310 427 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4LITE 0 0 0 0 0 0 0 clk 594 485 626 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4LITE_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4LITE 0 0 0 0 0 0 0 clk 532 591 627 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 602 224 426 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 556 310 427 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new AXI4MM 0 0 0 0 0 0 0 clk 594 485 626 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_AXI4MM_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old AXI4MM 0 0 0 0 0 0 0 clk 532 591 627 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 625 232 426 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 540 308 427 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new GENERIC 0 0 0 0 0 0 0 clk 579 474 626 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_GENERIC_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old GENERIC 0 0 0 0 0 0 0 clk 516 580 627 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new ICAP 0 0 0 0 0 0 0 clk 571 223 426 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old ICAP 0 0 0 0 0 0 0 clk 548 311 427 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new ICAP 0 0 0 0 0 0 0 clk 563 494 626 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_ICAP_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old ICAP 0 0 0 0 0 0 0 clk 548 587 627 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_new 0 0 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 625 233 426 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_0_hist_buf_when_full_discard_old 0 0 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 540 311 427 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_new 0 1 32 discard_new USR_ACCESS 0 0 0 0 0 0 0 clk 594 491 626 0 0 0 PRODUCTION 1.30 05-15-2022
xczu4cg fbvb900 1 xczu4cg-fbvb900-1-e_dp_protocol_USR_ACCESS_ctrl_1_hist_buf_when_full_discard_old 0 1 32 discard_old USR_ACCESS 0 0 0 0 0 0 0 clk 524 580 627 0 0 0 PRODUCTION 1.30 05-15-2022

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Copyright 2023 Xilinx, Inc. Xilinx, the Xilinx logo, Alveo, Artix, ISE, Kintex, Spartan, Versal, Virtex, Vivado, Zynq, and other designated brands included herein are trademarks of Xilinx in the United States and other countries. Arm is a registered trademark of Arm Limited in the EU and other countries. All other trademarks are the property of their respective owners.

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