Bit Depth Conversion

ThexFConvertBitDepthfunction converts the input image bit depth to the required bit depth in the output image.

API Syntax

template  void xFconvertTo(xF::Mat &_src_mat, xF::Mat &_dst_mat, ap_uint<4> _convert_type, int _shift)

Parameter Descriptions

The following table describes the template and the function parameters.

Table 1.xFConvertBitDepth Function Parameter Descriptions
Parameter Description
SRC_T

Input pixel type. 8-bit, unsigned, 1 channel (XF_8UC1),

16-bit, unsigned, 1 channel (XF_16UC1),

16-bit, signed, 1 channel (XF_16SC1),

32-bit, unsigned, 1 channel (XF_32UC1)

32-bit, signed, 1 channel (XF_32SC1) are supported.
DST_T

Output pixel yype. 8-bit, unsigned, 1 channel (XF_8UC1),

16-bit, unsigned, 1 channel (XF_16UC1),

16-bit, signed, 1 channel (XF_16SC1),

32-bit, unsigned, 1 channel (XF_32UC1)

32-bit, signed, 1 channel (XF_32SC1) are supported.
ROWS Height of input and output images
COLS Width of input and output images
NPC Number of pixels to be processed per cycle; possible options are XF_NPPC1 and XF_NPPC8 for 1 pixel and 8 pixel operations respectively.
_src_mat Input image
_dst_mat Output image
_convert_type This parameter specifies the type of conversion required. (See XF_convert_bit_depth_e enumerated type in filexf_params.hfor possible values.)
_shift Optional scale factor

Possible Conversions

The following table summarizes supported conversions. The rows are possible input image bit depths and the columns are corresponding possible output image bit depths (U=unsigned, S=signed).

Table 2.xFConvertBitDepth Function Supported Conversions
INPUT/OUTPUT U8 U16 S16 U32 S32
U8 NA yes yes NA yes
U16 yes NA NA NA yes
S16 yes NA NA NA yes
U32 NA NA NA NA NA
S32 yes yes yes NA NA

Resource Utilization

The following table summarizes the resource utilization of the xFConvertBitDepth function, generated using Vivado HLS 2017.1tool for the Xilinx Xczu9eg-ffvb1156-1-i-es1 FPGA, to process a grayscale HD (1080x1920) image.
Table 3.xFConvertBitDepth Function Resource Utilization Summary For XF_CONVERT_8U_TO_16S Conversion
Operating Mode

Operating Frequency

(MHz)

 Utilization Estimate
BRAM_18K DSP_48Es FF LUT CLB
1 pixel 300 0 8 581 523 119
8 pixel 150 0 8 963 1446 290
Table 4.xFConvertBitDepth Function Resource Utilization Summary For XF_CONVERT_16U_TO_8U Conversion
Operating Mode

Operating Frequency

(MHz)

 Utilization Estimate
BRAM_18K DSP_48Es FF LUT CLB
1 pixel 300 0 8 591 541 124
8 pixel 150 0 8 915 1500 308

Performance Estimate

The following table summarizes the performance in different configurations, as generated usingVivado HLS 2017.1tool for theXilinx Xczu9eg-ffvb1156-1-i-es1, to process a grayscale HD (1080x1920) image.

Table 5.xFConvertBitDepth Function Performance Estimate Summary
Operating Mode Latency Estimate
Max Latency
1 pixel operation (300 MHz) 6.91 ms
8 pixel operation (150 MHz) 1.69 ms