Building a Design with Hardware Accelerators

To build a project and generate an executable, bitstream, and SD Card boot image:

  1. Right-clicklab1in theProject Explorerand selectBuild Projectfrom the context menu that appears.
    The SDSoC™ system compiler stdout is directed to the Console tab. The functions selected for hardware are compiled using Vivado® HLS into IP blocks and integrated into a generated Vivado tools hardware system based on the selected base platform. The system compiler then invokes Vivado synthesis, place and route tools to build a bitstream, and invokes the ARM GNU compiler and linker to generate an application ELF executable file.
  2. In theSDx Project Settingswindow, under theReportstab, below theProject Explorertab, double-click to open theData Motion Network Report.
    This report shows the connections done by the SDx environment and the types of data transfers for each function implemented in hardware. For details, see Application Code Optimization.

  3. Open thelab1/Release/_sds/swstubs/mmult.cppfile, to see how the SDx system compiler replaced the originalmmultfunction with one named_p0_mmult_1_noasyncthat performs transfers to and from the FPGA usingcf_send_iandcf_waitfunctions. The SDx system compiler also replaces calls tommultwith_p0_mmult_1_noasyncinlab1/Release/_sds/swstubs/main.cpp. The SDx system compiler uses these rewritten source files to build the ELF that accesses the hardware functions.