Example: Direct I/O in an SDSoC Platform

An SDSoC platform can include input and output subsystems, e.g., analog-to-digital and digital-to-analog converters, or video I/O, by converting raw physical data streams into AXI4-Stream interfaces that are exported as part of the platform interface specification.In "Using External I/O" theSDSoC Environment User Guide: An Introduction to the SDSoC Environment(UG1027) includes a discussion of thezc702_axis_iosample platform.This example includes sample applications that demonstrate how an input data stream can be written directly into memory buffers without data loss, and how an application can "packetize" the data stream at the AXI transport level to communicate with other functions (including, but not limited to DMAs) that require packet framing.

The hardware component of an SDSoC platform is represented in a Vivado project which is located in thesrc/vivadosubdirectory. In an SDx Terminal shell, you can view the block diagram by opening the Vivado project using the command,vivado zc702_axis_io.xprand clickingOpen Block Designon the left in the Flow Navigator.

Figure:zc702_axis_io Block Diagram

Instead of live I/O from off-chip, this platform contains a free-running binary counter that generates a continuous stream of data samples at 50 MHz, which acts as a proxy for data streaming directly from FPGA pins. To convert this input data stream into an AXI4 stream for SDSoC applications, the platform connects the counter output to thes_axis_tdataslave port of an AXI4-Stream data FIFO, with a constant block providing the requireds_axis_tvalidsignal, always one. The data FIFO IP is configured to store up to 1024 samples with an output clock of 100 MHz to provide system elasticity so that the consumer of the stream can process the stream "bubble-free" (i.e., without dropping data samples). In a real platform, the means for converting to an AXI4 stream, relative clocking and amount of hardware buffering will vary according to system requirements.