pragma HLS clock
Description
Applies the named clock to the specified function.
C and C++ designs support only a single clock. The clock period specified bycreate_clock
is applied to all functions in the design.
SystemC designs support multiple clocks. Multiple named clocks can be specified using thecreate_clock
command and applied to individual SC_MODULEs usingpragma HLS clock
. Each SC_MODULE is synthesized using a single clock.
Syntax
Place the pragma in the C source within the body of the function.
#pragma HLS clock domain=
Where:
- domain=
: Specifies the clock name.
create_clock
command. There is no pragma equivalent of the create_clock command. See the
Vivado Design Suite User Guide: High-Level Synthesis(
UG902) for more information.
Example 1
Assume a SystemC design in which the top-level,foo_top
, has clocks portsfast_clock
andslow_clock
. However,foo_top
uses onlyfast_clock
within its function. A sub-block,foo_sub
, uses onlyslow_clock
.
In this example, the followingcreate_clock
commands are specified in thescript.tclfile which is specified when the Vivado HLS tool is launched:
create_clock -period 15 fast_clk create_clock -period 60 slow_clk
Then the following pragmas are specified in the C source file to assign the clock to the specified functions,foo_sub
andfoo_top
:
foo_sub (p, q) { #pragma HLS clock domain=slow_clock ... } void foo_top { a, b, c, d} { #pragma HLS clock domain=fast_clock ...
See Also
- Vivado Design Suite User Guide: High-Level Synthesis(UG902)