Data Access Pattern
#pragma SDS data access_pattern(ArrayName:pattern)
This pragma must be specified immediately preceding a function declaration, or immediately preceding another#pragma SDS
bound to the function declaration.
pattern
can be eitherSEQUENTIAL
orRANDOM
, by default it isRANDOM
This pragma specifies the data access pattern in the hardware function. If acopy
pragma has been specified for an array argument, SDSoC checks the value of this pragma to determine the hardware interface to synthesize. If the access pattern isSEQUENTIAL
, a streaming interface (such as ap_fifo) will be generated. Otherwise, withRANDOM
access pattern, a RAM interface will be generated. Refer toData Motion Network Generation in SDSoCfor the usage of this pragma in data motion network generation in SDSoC.
Example 1:
#pragma SDS data access_pattern(A:SEQUENTIAL) void foo(int A[1024], int B[1024])
In the example shown above, a streaming interface will be generated for argumentA
, while a RAM interface will be generated for argumentB
. The access pattern for argumentA
must be A[0], A[1], A[2], ... , A[1023], and all elements must be accessed only once. On the other hand, argumentB
can be accessed in a random fasion, and each element can be accessed zero or more times.
Example 2:
#pragma SDS data access_pattern(A:SEQUENTIAL) void foo(int *A, int B[1024])
In the above example, if argumentA
is intended to be a streaming port, the two pragmas shown must be applied. Without these, SDSoC synthesizes argumentA
as a register (IN, OUT, or INOUT based on the usage ofA
in functionfoo
).
Example 3:
zero_copy
pragma (refer to
Data Transfer Size) on the
access_pattern
pragma:
#pragma SDS data zero_copy(A) #pragma SDS data access_pattern(A:SEQUENTIAL) void foo(int A[1024], int B[1024])
In the above example, theaccess_pattern
pragama is ignored. Once azero_copy
pragma has been applied to an argument, the AXI4 interface will be synthesized for that argument. Please refer toZero Copy Data Moverfor more details.