Vivado Design Suite Project

The SDx™ IDE uses the Vivado® Design Suite project file (platform.xpr) in the/vivadodirectory as a starting point to build an application-specific SoC. The project must include an IP Integrator block diagram and can contain any number of source files. Although nearly any project targeting a Zynq SoC or MPSoC can be the basis for an SDSoC project, there are a few restrictions as described inHardware Requirements.

The Vivado Design Suite project must have the same name as the platform, and must reside in the following location:

/hw/vivado/.xpr.

For example:/SDx/2017.x/platforms/zc702/hw/vivado/zc702.xpr.

Important:

If you are moving the project file into the platform directory, you must place the complete Vivado Design Suite project in the same directory as the projectxprfile. You cannot simply copy the files in a Vivado tools project from one location to another. The Vivado Design Suite manages internal project states and file relationships in a way that is not preserved through a simple file copy. To properly copy the Vivado Design Suite project use theFile>Archive Projectcommand from the Vivado IDE to create a zip archive. Copy and unzip this archive file into the SDSoC/vivadodirectory.

If you encounter IP Locked errors when the SDx IDE invokes the Vivado tools, it is a result of failing to properly copy the Vivado project, or failing to upgrade the IP and output products.

Creating a Vivado Project

To create the Vivado Design Suite project for use in an SDSoC platform follow these steps:

  1. Create a directory structure such as/hw/vivado
  2. Launch the Vivado IDE.
  3. From the Vivado Design Suite use theCreate New Projectcommand to create the platform project calledin that directory.
    Tip:You can also edit an existing project as a starting point for creating a new SDSoC platform.
  4. Select the Xilinx device or a supported board, such as the ZC702 or Zybo board, to use for your SDSoC platform. For more information on creating projects and selecting parts or boards, refer toVivado Design Suite User Guide: Designing IP Subsystems using IP Integrator(UG994).
  5. After the top-level Vivado project opens in the Vivado IDE, use theCreate Block Designcommand to create a block design also named after the platform,.
  6. With the block design open in the IP Integrator feature, instantiate the embedded processor IP from the IP catalog, as well as other Xilinx IP or custom IP needed to complete the design as shown in the following figure. For more information on creating an embedded processor block design refer toVivado Design Suite User Guide: Embedded Processor Hardware Design(UG898).

    Figure:Example Block Design in IP Integrator

  7. Validatethe block design to ensure everything is correct, andSavethe design.
  8. Generate Output Productsof the IP in the block design.
  9. Use theCreate Wrappercommand to create the top-level RTL design.
  10. Export Hardwareto SDK to provide the boot loaders and target operating system required for the software elements of the platform. Refer toSoftware Platform Data Creationfor more information on defining the software platform libraries.
  11. Archive Projectand move it into the SDSoC platform directory structure if needed.