First Stage Boot Loader (FSBL)
The first stage boot loader (FSBL) is responsible for loading the bitstream and configuring the Zynq® architecture Processing System (PS) at boot time.
When the platform project is open in Vivado® Design Suite, click the
menu option.Create a new software projectfsblas you would using the Xilinx SDK.
with the nameUsing the exported Hardware Platform, select the Zynq FSBL application from the list. This creates an FSBL executable.
For more detailed information, see theSDK Help System.
Once you generate the FSBL, you must copy it into a standard location for the SDx environment flow.
samples/platforms/zc702_axis_io/sw/boot/fsbl.elf
For the SDx system compiler to use an FSBL, a BIF file must point to it, as defined by thesdx:bif
attribute of the
element. Refer to theSoftware Platform XML Metadata Referencefor more information on thesdx:bif
attribute. The file must reside in the
boot.bif
file for the Zynq®-7000 All Programmable (AP) SoC:
/* linux */ the_ROM_image: { [bootloader] }
boot.bif
file for the Zynq UltraScale+™ MPSoC device:
/* linux */ the_ROM_image: { [fsbl_config] a53_x64 [bootloader] [pmufw_image] [destination_device=pl] [destination_cpu=a53-0, exception_level=el-3, trustzone] [destination_cpu=a53-0, exception_level=el-2] }