System Port

The system port connects the data mover to the PS. It can be either the ACP or AFI port on Zynq. The ACP port is a cache-coherent port and the cache coherency is maintained by the hardware. The AFI port is a non-cache-coherent port. Cache coherency (i.e. cache flushing and cache invalidation) is maintained by software if needed. Selecting between the ACP port versus the AFI port depends on the cache requirement of the transferred data.

The system port choice is dependent on the data’s cache attribute and data size. If the data is allocated withsds_alloc_non_cacheable()orsds_register_dmabuf(), it is better to connect to the AFI port to avoid cache flushing/invalidation. If the data is allocated in other ways, it is better to connect to the ACP port for fast cache flushing/invalidation.

SDSoC compiler analyzes these memory attributes for the data transferred to and received from the accelerator, and connects data movers to the appropriate system port. However, if the user would like to override the compiler decision, or in some cases, the compiler is not able to do such analysis, the user can use the following pragma to specify the system port.

#pragma SDS data sys_port(arg:port)

Whereportcan be eitherACP,AFI, orMIG.

The data size pragmas (#pragma SDS data copyand#pragma SDS data zero_copy) have been discussed previously. Notice the user must make sure the specified pragma is correct.