Performance and Resource Utilization for Video Frame Buffer Write v2.5

Vivado Design Suite Release 2023.2

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Versal ACAP

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
SAMPLES_PER_CLOCK
MAX_COLS
MAX_ROWS
MAX_DATA_WIDTH
AXIMM_DATA_WIDTH
HAS_RGBX8
HAS_YUVX8
HAS_YUYV8
HAS_RGBX10
HAS_YUVX10
HAS_Y_UV8
HAS_Y_UV8_420
HAS_RGB8
HAS_YUV8
HAS_Y_UV10
HAS_Y_UV10_420
HAS_Y8
HAS_Y10
HAS_BGRX8
HAS_UYVY8
HAS_BGR8
HAS_RGBX12
HAS_RGB16
HAS_YUVX12
HAS_Y_UV12
HAS_Y_UV12_420
HAS_Y12
HAS_YUV16
HAS_Y_UV16
HAS_Y_UV16_420
HAS_Y16
HAS_Y_U_V8
HAS_Y_U_V8_420
HAS_Y_U_V10
MAX_NR_PLANES
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_09 1 10328 7760 8 64 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 373 3635 4836 0 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_10 2 10328 7760 8 128 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 443 1819 2450 0 9 1 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_11 4 10328 7760 8 256 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 357 4360 10307 0 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_12 8 10328 7760 8 512 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 349 10262 24094 0 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_14 2 10328 7760 8 128 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 373 4425 7985 0 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_15 4 10328 7760 8 256 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 443 5916 13142 0 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_17 1 10328 7760 8 64 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 529 3120 4159 0 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_19 4 10328 7760 8 256 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 357 6641 13742 0 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_20 8 10328 7760 8 512 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 443 8076 20197 0 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_21 1 10328 7760 8 64 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 412 1914 2407 1 9 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_24 8 10328 7760 8 512 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 537 3940 7382 1 15 1 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_25 1 10328 7760 8 64 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 607 1692 2096 1 9 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_27 4 10328 7760 8 256 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 357 5928 13108 0 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_28 8 10328 7760 8 512 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 381 6704 11999 0 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_29 1 10328 7760 8 64 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 318 3565 4471 0 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_32 8 10328 7760 8 512 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 388 6153 11778 0 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_33 1 10328 7760 8 64 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 552 3116 4571 0 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_35 4 10328 7760 8 256 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 474 5978 13212 0 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_36 8 10328 7760 8 512 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 427 2696 4921 0 15 1 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_37 1 10328 7760 8 64 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 513 3914 5529 1 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_38 2 10328 7760 8 128 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 388 3810 7239 1 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_40 8 10328 7760 8 512 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 474 7632 13849 1 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_08bit__conf_41 1 10328 7760 8 64 1 1 1 0 0 1 1 1 1 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 357 4581 6678 2 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_42 2 10328 7760 8 128 1 1 1 0 0 1 1 1 1 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 412 6742 11588 1 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_43 4 10328 7760 8 256 1 1 1 0 0 1 1 1 1 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 427 8637 14151 1 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_08bit__conf_44 8 10328 7760 8 512 1 1 1 0 0 1 1 1 1 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 357 18587 37157 1 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_45 1 10328 7760 10 64 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 3 ap_clk 521 4399 6070 1 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_47 4 10328 7760 10 256 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 3 ap_clk 458 6444 13318 1 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_49 1 10328 7760 10 64 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 466 1703 2139 1 9 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_50 2 10328 7760 10 128 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 537 3436 5161 0 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_52 8 10328 7760 10 512 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 450 10400 24362 0 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_53 1 10328 7760 10 64 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 537 3220 4585 0 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_54 2 10328 7760 10 128 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 412 4099 6416 1 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_56 8 10328 7760 10 512 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 443 10667 24745 0 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_57 1 10328 7760 10 64 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 388 2941 3988 0 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_58 2 10328 7760 10 128 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 521 3586 7056 0 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_61 1 10328 7760 10 64 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 381 3605 5182 2 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_62 2 10328 7760 10 128 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 3 ap_clk 357 5420 9713 2 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_63 4 10328 7760 10 256 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 3 ap_clk 435 8414 15956 2 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_64 8 10328 7760 10 512 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 474 7489 13948 1 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_66 2 10328 7760 10 128 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 ap_clk 381 3583 5593 1 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_67 4 10328 7760 10 256 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 482 5242 11160 1 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_68 8 10328 7760 10 512 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 ap_clk 458 6772 13209 1 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_70 2 10328 7760 10 128 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 544 4264 6463 1 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_71 4 10328 7760 10 256 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 341 6028 12791 0 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_72 8 10328 7760 10 512 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 435 8631 15329 1 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_73 1 10328 7760 10 64 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 412 3235 4735 1 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_74 2 10328 7760 10 128 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 615 1874 2791 2 9 1 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_75 4 10328 7760 10 256 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 396 5592 9614 1 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_76 8 10328 7760 10 512 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 388 6344 11947 1 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_77 1 10328 7760 10 64 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 3 ap_clk 513 3862 5452 1 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_78 2 10328 7760 10 128 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 3 ap_clk 498 4766 8292 1 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_79 4 10328 7760 10 256 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 3 ap_clk 443 6475 13270 1 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_81 1 10328 7760 10 64 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 521 3526 4977 1 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_82 2 10328 7760 10 128 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 506 4318 6430 1 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_84 8 10328 7760 10 512 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 3 ap_clk 427 10360 23837 1 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_85 1 10328 7760 10 64 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 552 1892 2483 1 9 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_86 2 10328 7760 10 128 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 3 ap_clk 506 4054 5846 2 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_87 4 10328 7760 10 256 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 3 ap_clk 349 7513 14574 2 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_88 8 10328 7760 10 512 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 3 ap_clk 365 7752 14626 2 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_89 1 10328 7760 10 64 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 466 5395 7451 3 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_90 2 10328 7760 10 128 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 427 7679 11274 3 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_10bit__conf_91 4 10328 7760 10 256 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 412 10254 17146 3 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_10bit__conf_92 8 10328 7760 10 512 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 256 19680 31975 1 29 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_12bit__conf_5 1 10328 7760 12 64 0 1 1 1 0 0 1 0 1 1 1 0 1 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 1 3 ap_clk 318 4876 6535 2 25 0 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_12bit__conf_6 2 10328 7760 12 128 0 1 1 1 1 0 0 1 1 1 0 1 1 0 1 1 1 0 0 0 0 1 0 0 0 0 1 1 1 3 ap_clk 349 9495 15569 2 23 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_12bit__conf_7 4 10328 7760 12 256 1 1 1 0 1 0 0 1 0 1 1 0 1 1 1 0 1 0 0 1 0 1 0 0 0 0 1 0 1 3 ap_clk 271 13056 20432 2 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 2MP v_frmbuf_wr_16bit__conf_3 4 10328 7760 16 256 1 0 0 0 0 1 1 1 1 1 0 1 1 1 1 0 0 0 0 1 0 0 1 1 0 1 0 1 1 3 ap_clk 373 14543 25904 2 25 3 PRODUCTION 2.12 2023-09-01
xcvc1902 vsva2197 1LP v_frmbuf_wr_16bit__conf_4 8 10328 7760 16 512 1 1 1 1 1 1 1 0 0 1 1 0 1 1 1 0 1 0 1 1 1 1 1 1 0 0 0 0 1 3 ap_clk 232 24810 33785 0 29 3 PRODUCTION 2.12 2023-09-01

Zynq UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
SAMPLES_PER_CLOCK
MAX_COLS
MAX_ROWS
MAX_DATA_WIDTH
AXIMM_DATA_WIDTH
HAS_RGBX8
HAS_YUVX8
HAS_YUYV8
HAS_RGBX10
HAS_YUVX10
HAS_Y_UV8
HAS_Y_UV8_420
HAS_RGB8
HAS_YUV8
HAS_Y_UV10
HAS_Y_UV10_420
HAS_Y8
HAS_Y10
HAS_BGRX8
HAS_UYVY8
HAS_BGR8
HAS_RGBX12
HAS_RGB16
HAS_YUVX12
HAS_Y_UV12
HAS_Y_UV12_420
HAS_Y12
HAS_YUV16
HAS_Y_UV16
HAS_Y_UV16_420
HAS_Y16
HAS_Y_U_V8
HAS_Y_U_V8_420
HAS_Y_U_V10
MAX_NR_PLANES
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_13 1 10328 7760 8 64 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 435 3654 4695 0 19 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_16 8 10328 7760 8 512 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 427 6905 11349 0 29 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_18 2 10328 7760 8 128 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 404 5042 8018 0 23 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_22 2 10328 7760 8 128 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 3 ap_clk 404 5222 8263 1 23 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_23 4 10328 7760 8 256 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 474 5389 8165 1 25 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_26 2 10328 7760 8 128 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 427 3395 4751 0 23 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_30 2 10328 7760 8 128 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 443 3293 4734 0 23 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_31 4 10328 7760 8 256 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 435 4435 6999 0 25 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_34 2 10328 7760 8 128 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 631 1854 2404 0 9 1 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_08bit__conf_39 4 10328 7760 8 256 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 482 5409 8170 1 25 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_46 2 10328 7760 10 128 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 419 3340 4733 0 23 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_48 8 10328 7760 10 512 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 607 2847 4461 0 15 1 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_51 4 10328 7760 10 256 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 427 4487 7007 0 25 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_55 4 10328 7760 10 256 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 3 ap_clk 458 5130 10673 0 25 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_59 4 10328 7760 10 256 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 3 ap_clk 474 5045 7654 0 25 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_60 8 10328 7760 10 512 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 ap_clk 482 4167 6777 0 22 2 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_65 1 10328 7760 10 64 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 3 ap_clk 435 3320 4586 1 19 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_69 1 10328 7760 10 64 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ap_clk 631 1686 2025 0 8 1 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_80 8 10328 7760 10 512 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 3 ap_clk 435 6673 11696 1 29 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_10bit__conf_83 4 10328 7760 10 256 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 1 1 1 3 ap_clk 412 7806 14869 1 25 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_12bit__conf_8 8 10328 7760 12 512 1 1 0 1 0 1 1 0 1 1 1 1 0 0 0 0 1 0 1 0 0 0 0 0 0 0 0 0 0 2 ap_clk 349 15308 21223 2 22 2 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_16bit__conf_1 1 10328 7760 16 64 0 0 1 0 0 1 0 0 1 0 0 1 0 1 1 1 1 0 0 0 0 0 1 1 0 1 1 1 0 3 ap_clk 373 6406 7611 1 19 3 PRODUCTION 1.30 05-15-2022
xczu7ev ffvc1156 2 v_frmbuf_wr_16bit__conf_2 2 10328 7760 16 128 0 1 1 1 1 0 0 1 1 0 1 0 0 0 1 1 1 1 0 1 1 1 0 1 0 0 0 0 1 3 ap_clk 381 10047 13682 3 23 3 PRODUCTION 1.30 05-15-2022

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