Performance and Resource Utilization for AXI Data FIFO v2.1

Vivado Design Suite Release 2023.2

Interpreting the results

This page contains maximum frequency and resource utilization data for several configurations of this IP core. The data is separated into a table per device family. In each table, each row describes a test case. The columns are divided into test parameters and results. The test parameters include the part information and the core-specific configuration parameters. Any configuration parameters that are not listed have their default values; any parameters with a blank value are disabled or set automatically by the IP core. Consult the product guide for this IP core for a list of GUI parameter and user parameter mappings.

Data is provided for the following device families:

Artix-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
PROTOCOL
READ_WRITE_MODE
ADDR_WIDTH
DATA_WIDTH
ID_WIDTH
WRITE_FIFO_DEPTH
READ_FIFO_DEPTH
WRITE_FIFO_DELAY
READ_FIFO_DELAY
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7a200t fbg676 2 axi4_bram_7a2 AXI4 READ_WRITE 32 1024 4 512 512 0 0 N/A 275 129 2309 0 30 2 PRODUCTION 1.23 2018-06-13
xc7a200t fbg676 2 axi4_lutram_7a2 AXI4 READ_WRITE 32 1024 4 32 32 0 0 N/A 294 1520 4450 0 0 0 PRODUCTION 1.23 2018-06-13
xc7a200t fbg676 2 axi4_pkt_7a2 AXI4 READ_WRITE 32 1024 4 512 512 1 1 N/A 225 350 2828 0 30 2 PRODUCTION 1.23 2018-06-13

Kintex-7

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
PROTOCOL
READ_WRITE_MODE
ADDR_WIDTH
DATA_WIDTH
ID_WIDTH
WRITE_FIFO_DEPTH
READ_FIFO_DEPTH
WRITE_FIFO_DELAY
READ_FIFO_DELAY
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xc7k325t ffg900 2 axi4_bram_7k2 AXI4 READ_WRITE 32 1024 4 512 512 0 0 N/A 363 143 2309 0 30 2 PRODUCTION 1.12 2017-02-17
xc7k325t ffg900 2 axi4_lutram_7k2 AXI4 READ_WRITE 32 1024 4 32 32 0 0 N/A 444 1529 4450 0 0 0 PRODUCTION 1.12 2017-02-17
xc7k325t ffg900 2 axi4_pkt_7k2 AXI4 READ_WRITE 32 1024 4 512 512 1 1 N/A 357 359 2834 0 30 2 PRODUCTION 1.12 2017-02-17

Kintex UltraScale

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
PROTOCOL
READ_WRITE_MODE
ADDR_WIDTH
DATA_WIDTH
ID_WIDTH
WRITE_FIFO_DEPTH
READ_FIFO_DEPTH
WRITE_FIFO_DELAY
READ_FIFO_DELAY
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku040 ffva1156 2 axi4_pkt_ku2 AXI4 READ_WRITE 32 1024 4 512 512 1 1 N/A 438 357 2835 0 30 2 PRODUCTION 1.25 12-04-2018

Kintex UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
PROTOCOL
READ_WRITE_MODE
ADDR_WIDTH
DATA_WIDTH
ID_WIDTH
WRITE_FIFO_DEPTH
READ_FIFO_DEPTH
WRITE_FIFO_DELAY
READ_FIFO_DELAY
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xcku5p ffvb676 2 axi4_bram_ku2 AXI4 READ_WRITE 32 1024 4 512 512 0 0 N/A 594 149 2323 0 30 2 PRODUCTION 1.29 05-01-2022
xcku5p ffvb676 2 axi4_lutram_ku2 AXI4 READ_WRITE 32 1024 4 32 32 0 0 N/A 763 1323 4485 0 0 0 PRODUCTION 1.29 05-01-2022
xcku5p ffvb676 2 axi4_pkt_ku5p AXI4 READ_WRITE 32 1024 4 512 512 1 1 N/A 600 366 2859 0 30 2 PRODUCTION 1.29 05-01-2022

Zynq UltraScale+

Part Information Configuration Parameters Performance and Resource Utilization
Device Package Speed Grade Configuration Name
PROTOCOL
READ_WRITE_MODE
ADDR_WIDTH
DATA_WIDTH
ID_WIDTH
WRITE_FIFO_DEPTH
READ_FIFO_DEPTH
WRITE_FIFO_DELAY
READ_FIFO_DELAY
Clock Input Fmax (MHz) LUTs FFs DSPs 36k BRAMs 18k BRAMs Speedfile Status
xczu9eg ffvb1156 2 axi4_bram_7z2 AXI4 READ_WRITE 32 1024 4 512 512 0 0 N/A 594 141 2317 0 30 2 PRODUCTION 1.30 05-15-2022
xczu9eg ffvb1156 2 axi4_pkt_7z2 AXI4 READ_WRITE 32 1024 4 512 32 0 0 N/A 650 704 3336 0 16 1 PRODUCTION 1.30 05-15-2022
xczu9eg ffvb1156 2 axi4_pkt_zu9eg AXI4 READ_WRITE 32 1024 4 512 512 1 1 N/A 588 362 2834 0 30 2 PRODUCTION 1.30 05-15-2022

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