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Xilinx Virtex-7 FPGA VC7203 Characterization Kit

by: Xilinx, Inc

The Virtex®-7 FPGA VC7203 Characterization Kit provides the hardware environment for characterizing and evaluating 28 GTX (12.5Gbps) transceivers of the on-board Virtex-7 V485T FPGA.

  • Price:$10,494.00
  • Part Number:CK-V7-VC7203-G
  • Lead Time:2 Weeks
  • Device Support:
    • Virtex-7
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Overview

Product Description

The Virtex®-7 FPGA VC7203 Characterization Kit provides the hardware environment for characterizing and evaluating 28 GTX (12.5Gbps) transceivers of the on-board Virtex-7 V485T FPGA. The VC7203 allows evaluation of the Integrated Bit Error Ratio Test (IBERT) demonstration using either the Vivado™ or ISE® design suites. Each GTX Quad and its associated reference clock are routed from the FPGA to a connector pad which is designed to interface with a Samtec BullsEye connector. A cable enabled with a BullsEye connector and 10 standard SMAs allows users to connect to a broad range of evaluation platforms, from backplanes and optical evaluation boards to high speed test equipment. Each BullsEye connector handles a full GTX Quad, four transmit/receive pairs as well as the two independent reference clocks, enabling the highest level of flexibility in testing custom applications.

Key Features & Benefits

  • Hardware environment for characterizing and evaluating 28 GTX (12.5Gbps) transceivers on the Virtex-7 V485T FPGAs
  • Hardware, design tools, IP, and pre-verified reference designs
  • Integrated Bit Error Ratio Test (IBERT) reference design
  • BullsEye connector supporting a full GTX Quad, with four transmit/receive pairs
  • Nine Samtec BullsEye connector pads for the GTX transceivers and reference clocks
  • Two pairs of differential MRCC inputs with SMA connectors
  • System ACE™ SD controller
  • Expand I/O with 3 FPGA Mezzanine Card (FMC) interface

Featured Xilinx Devices

Featuring the ROHS compliant VC7203 kit including theXC7VX485T-3FFG1761E FPGA

Logic Cells 485,760
DSP Slices 2,800
Memory (Kb) 37,080
GTY 12.5 Gb/s Transceivers 56
I/0 Pins 700
virtex-7-bk-chip

Product Information

Specifications

Board Features

Featuring theVC7203 Characterization Board

VC7203-characterization-kit

Communication & Networking

  • Nine Samtec BullsEye connector pads for the GTX transceivers and reference clocks
  • Two pairs of differential MRCC inputs with SMA connectors
  • USB-to-UART bridge

Clocking

  • Fixed, 200 MHz 2.5V LVDS oscillator wired to multi-region clock capable (MRCC) inputs
  • SuperClock-2 module supporting multiple frequencies

Display

  • Power status LEDs
  • General purpose DIP switches, LEDs, push buttons, and test I/O

Expansion Connectors

  • Three VITA 57.1 FPGA mezzanine card (FMC) high pin count (HPC) connectors

Configuration

  • Digilent USB JTAG programming port

Memory

  • System ACE™ SD controller

Control & I/O

  • I2C Bus

Power

  • PMBus connectivity to on-board digital power supplies
What's Inside

What's Inside

VC7203 Evaluation Board

Featuring the Virtex-7 XC7VX485T-3FFG1761E FPGA

Full seat Vivado® Design Suite: Design Edition

Node locked & Device-locked to the Virtex-7 XC7VX485T FPGA, with 1 year of updates

Samtec Bullseye Cable

10 standard SMAs

Superclock-2 Module Supporting Multiple Frequencies

Resources

Documentation

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    Tools & IP

    Design Tools

    Name Description License Type
    Vivado Design Suite Design Edition The Xilinx Vivado® Design Suite is a revolutionary IP and System Centric design environment built from the ground up to accelerate the design for FPGAs and SoCs. Node locked & Device-locked to the Virtex-7 XC7VX485T FPGA, with 1 year of updates
    Training & Support

    Training

    Support